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KEY TAKEAWAYS

•   Moore's law, which for fifty years has predicted rapid increases in semiconductor capabilities at decreasing costs, is now ending, raising profound implications for the future of hardware and software development.

•   Recent research has identified methods that allow innovations in materials, devices, fabrication, and hardware to be added to existing process or systems at low incremental costs. These methods need to be further developed since they will be essential to continue to improve the computing infrastructure we all depend on. 

•   Quantum computing may solve certain specialized problems, but experts debate whether it can ever achieve the rapid, consistent, predictable performance growth that semiconductors have enjoyed.

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Overview

Chips must be designed and then manufactured, calling for two different skill sets. Very few companies perform both design and fabrication (Intel is one). Many companies specialize in design (e.g., Qualcomm, Apple, NVIDIA). Others specialize in chip manufacturing—or fabrication. The Taiwan Semiconductor Manufacturing Company (TSMC) is by far the world’s largest “fab” company. Samsung in South Korea is a distant second, and UMC, also in Taiwan, ranks third. With a large fraction of the world’s chip factories physically in Taiwan, the global supply chain for chips is clearly fragile.

MOORE'S LAW IS ENDING
 

For the past fifty-plus years, the number of transistors on a chip has doubled roughly every two years at similar cost, meaning the computational power of a leading chip can be expected to double every few years. This trend, known as Moore’s law, depends on steady improvements in manufacturing tools and a set of economic conditions that make it financially sensible to invest in the construction of new state-of-the-art facilities that can cost $20 billion. Moore’s law is not a law of physics, but an observed trend that has been so consistent that everyone expects the cost of computing to regularly decrease with time. Unfortunately, Moore’s law has been slowing down, and the end appears to be in sight, raising profound implications for future systems and design. As a result, innovative methods in other areas need to be further developed. Alternatively, improvements in end-user applications will come from better optimization of algorithms or hardware to the application, rather than better scaled hardware. 

QUANTUM COMPUTING
 

The slowing of semiconductor improvements has increased interest in alternative technologies like quantum computing (QC). Quantum computers employ a different way of performing computation from traditional computers, allowing for some tasks to be completed much faster. However, the different framing also requires completely different hardware and approaches to algorithm design. For QC to be successful, it will be necessary to drastically scale the number of qubits—or data units—while decreasing error rates. The best quantum machines today have around fifty qubits and can do about three hundred two-qubit operations between errors. For comparison, conventional computers have billions of bits and can do more than a million billion operations before errors occur. 

How to create a growing market for quantum computers is one of the biggest challenges in the field. As of today, no one has found a commercial problem which a near-term quantum computer can solve that can’t also be solved as effectively on a conventional computer. Given the large initial cost of a quantum computer relative to conventional computing, this situation means that we still don’t have a commercial market for quantum computing. For QC to flourish, it will need a virtuous cycle created by a growing market that funds increasingly difficult technology development. 

Over the Horizon

Moore’s law has enabled us to produce computing systems of amazing power and complexity, but they also require huge and expensive design teams and must be manufactured in fabs costing billions of dollars to construct. As a result, the industry has consolidated. The result is a paradox. Performing the necessary optimizations requires innovative researchers willing to try radical ideas that in the end might not succeed. But how can we find researchers and companies willing to take on these risks if every attempt costs $100 million or takes two years?

A potential avenue of progress calls for making the complexity of the design tasks proportional to the change you are making, rather than the complexity of the resulting system. Imagine how little home remodeling would be done, for example, if every idea for remodeling entailed revision of all the blueprints for the entire house, as though everything had to be redone from scratch. The latter more closely corresponds to the process of state-of-the-art chip design today. The solution involves breaking the system into reusable components, which would decrease design costs. 

The goal is to allow the prototyping of solutions at low cost that build off a common, underlying base platform. Since building a platform is very expensive, for this idea to succeed it is critical to convince some firms which have complete working systems (e.g., Nvidia, Apple, Intel, AMD, and Qualcomm) to participate in the effort. This approach bears substantial similarity to the model of the app store, which provides an open interface while keeping the base system proprietary. The app store model balances open innovation with the profit motives of companies.

REPORT PREVIEW: Semiconductors

Faculty Council Advisor

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Mark A. Horowitz
Author
Mark A. Horowitz

Mark A. Horowitz is the Yahoo! Founders Professor in the School of Engineering and professor of electrical engineering and computer science at Stanford University. His research has contributed to early RISC (reduced instruction set computer) microprocessors, multiprocessor designs, and high-speed interfaces, and he currently works to create new agile design methodologies for analog and digital VLSI (very-large-scale integration) circuits. He received his PhD in electrical engineering from Stanford University.

View Bio
mark-horowitz_profilephoto.jpg
Mark A. Horowitz

Mark A. Horowitz is the Yahoo! Founders Professor in the School of Engineering and professor of electrical engineering and computer science at Stanford University. His research has contributed to early RISC (reduced instruction set computer) microprocessors, multiprocessor designs, and high-speed interfaces, and he currently works to create new agile design methodologies for analog and digital VLSI (very-large-scale integration) circuits. He received his PhD in electrical engineering from Stanford University.

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